1. Field of the Invention
The present invention generally relates to technology for manufacturing a semiconductor device, and more particularly, to a semiconductor device which has improved radiation efficiency and a method for manufacturing the semiconductor device.
This application is a counterpart of Japanese patent application, Ser. No. 104732/2000, filed Apr. 6, 2000, the subject matter of which is incorporated herein by reference.
2. Description of the Related Art
Recently, the spread of mobile terminals has been accelerated, and smaller, thinner and lighter mobile terminals are desired. In order to achieve compactness, effort has been made to reduce the size of the semiconductor devices mounted on the mobile terminal. Such efforts are focused on the development of semiconductor devices having a semiconductor package about the size of a chip, referred to as Chip Size Package (hereinafter CSP).
The size of CSP is substantially the same as that of the chip or slightly larger. There is a resin sealed type semiconductor device which is referred to as Wafer Level Chip Size Package/Wafer Level Chip Scale Package (hereinafter W-CSP) among CSP. The size of W-CSP is the same as that of the chip.
The conventional CSP type semiconductor device will be described with reference to FIGS. 12-14.
FIG. 12 is an entire perspective view showing a wafer and the conventional resin sealed type semiconductor device taken by dicing the wafer. FIG. 13 is a cross sectional view taken line A—A of the semiconductor device shown in FIG. 12. As shown in FIG. 13, the conventional resin sealed type semiconductor device comprises a semiconductor chip 1301, posts 1302, solder bumps 1303, connector members 1304, a sealing resin 1305, pads 1306 and an insulating film 1308. The semiconductor chip 1301 has a main surface 1301a in which a circuit, e.g. a transistor etc., is formed. The pads 1306, which are made of aluminum, are formed on the main surface 1301a of the semiconductor chip 1301. The insulating film 1307 is formed on the main surface 1301a of the semiconductor chip 1301. The connector members 1304 are electrically connected to the pads 1306 and to the posts 1302. The connector members 1304 function as interconnectors, and are made of copper. The posts 1302, which are made of copper, formed on the connector members 1304. The solder bump bumps 1303 are mounted on the upper surfaces of the posts 1302, and are electrically connected to the posts 1302. The solder bumps 1303 provide partly-spherical electrodes. The sealing resin 1305 seals the insulating film 1307, the connector members 1304, and the posts 1302 except for the solder bumps 1303. Now, due to explanatory convenience, the number of posts 1302 etc is limited to one or two in the drawings.
Processes which include a process of mounting the solder bumps 1303, are performed in a wafer state. After these processes are completed, the wafer is diced. Thereby, the conventional resin sealed type semiconductor device, which is called CSP, is obtained (refer to FIG. 13).
The heat radiation path of a conventional resin sealed type semiconductor device will be described with reference to FIG. 14. As shown in FIG. 14, the conventional resin sealed type semiconductor device is mounted on a substrate 1401 via the solder bumps 1303. Arrows shown in FIG. 14 designate the radiation path of the heat radiated from the semiconductor chip 1301 to the outside of the semiconductor device. As shown in FIG. 14, the heat generated near the main surface 1301a of the semiconductor chip 1301, is radiated via the posts 1302, the solder bumps 1303 and the substrate 1401.
However, the main surface 1301a of the semiconductor chip 1301 is covered with the sealing resin 1305, which has a low thermal conductivity. Therefore, the radiation or heat flow path near the main surface 1301a, is limited to the path explained above. Consequently, the heat near the main surface is dissipated well enough.